Great! Let me work on some of this and get back to you ASAP. -Soumyaroop.
On Wed, Aug 19, 2009 at 5:57 PM, Korey Sewell <[email protected]> wrote: > > Could you give me any pointers to debug this? > > Sure ... Thanks for your interest... > > I think the problem is that right now the model is hardcoded for 1 thread > in some places. The resources for the model are specified in > "pipeline_traits.cc" and then I believe workloads are registered somewhere > in "cpu.cc" and/or "*_cpu_builder.cc". > > To debug, I would be more interested in what's happening on cycle 0. Are > the workloads even getting setup correctly? There may be another flag that > you can turn on (Process?) ... Compare the output you are getting w/out SMT > in inorder and w/SMT for inorder. Do you see the workload getting setup in > one of those? If not, I would add my own DPRINTF debug messages to the > aforementioned files. > > Once you've verified the workloads are being loaded, then the next question > is why aren't the threads being fetched from? Check "first_stage.cc" in that > case... I would guess the threads arent being added to the activeThreads > list correctly maybe. > > If you are willing to help debug and commit changes, we'd more than > appreciate it. Personally, I've got my hands full with getting around to O3 > SMT stuff but help would be much appreciated on inorder. I'm going to dig up > and send you some of the hardcoded SMT stuff I have for inorder to help you > along the way as well... > > > > -- > - Korey > > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > > -- Soumyaroop Roy Ph.D. Candidate Department of Computer Science and Engineering University of South Florida, Tampa http://www.csee.usf.edu/~sroy
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