changeset d9c23fff4f13 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=d9c23fff4f13
description:
X86: Make the imm8 member of immediate microops really 8 bits
consistently.
diffstat:
1 file changed, 4 insertions(+), 4 deletions(-)
src/arch/x86/isa/microops/regop.isa | 8 ++++----
diffs (36 lines):
diff -r c248b0348d85 -r d9c23fff4f13 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Wed Sep 16 19:28:30 2009 -0700
+++ b/src/arch/x86/isa/microops/regop.isa Wed Sep 16 19:28:57 2009 -0700
@@ -149,12 +149,12 @@
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
- InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
+ InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext);
%(class_name)s(ExtMachInst _machInst,
const char * instMnem,
- InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
+ InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext);
%(BasicExecDeclare)s
@@ -203,7 +203,7 @@
inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
- InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
+ InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
false, false, false, false,
@@ -216,7 +216,7 @@
inline %(class_name)s::%(class_name)s(
ExtMachInst machInst, const char * instMnem,
bool isMicro, bool isDelayed, bool isFirst, bool isLast,
- InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
+ InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext) :
%(base_class)s(machInst, "%(mnemonic)s", instMnem,
isMicro, isDelayed, isFirst, isLast,
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev
