changeset 36aa46630e62 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=36aa46630e62
description:
ARM: Get rid of the Raddr operand.
diffstat:
1 file changed, 1 deletion(-)
src/arch/arm/isa/operands.isa | 1 -
diffs (11 lines):
diff -r 260676453f66 -r 36aa46630e62 src/arch/arm/isa/operands.isa
--- a/src/arch/arm/isa/operands.isa Sun Nov 08 00:54:32 2009 -0800
+++ b/src/arch/arm/isa/operands.isa Sun Nov 08 01:57:34 2009 -0800
@@ -63,7 +63,6 @@
'Rdo': ('IntReg', 'uw', '(RD & ~1)', 'IsInteger', 4, maybePCRead,
maybePCWrite),
'Rde': ('IntReg', 'uw', '(RD | 1)', 'IsInteger', 5, maybePCRead,
maybePCWrite),
- 'Raddr': ('IntReg', 'uw', '17', 'IsInteger', 6),
'Rhi': ('IntReg', 'uw', '18', 'IsInteger', 7),
'Rlo': ('IntReg', 'uw', '19', 'IsInteger', 8),
'LR': ('IntReg', 'uw', '14', 'IsInteger', 9),
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