changeset 06d26015e4f1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=06d26015e4f1
description:
ARM: Differentiate between LDM exception return and LDM user regs.
diffstat:
1 file changed, 5 insertions(+), 3 deletions(-)
src/arch/arm/isa/formats/macromem.isa | 8 +++++---
diffs (29 lines):
diff -r d86d3d6e5326 -r 06d26015e4f1 src/arch/arm/isa/formats/macromem.isa
--- a/src/arch/arm/isa/formats/macromem.isa Tue Nov 17 18:02:08 2009 -0600
+++ b/src/arch/arm/isa/formats/macromem.isa Tue Nov 17 18:02:08 2009 -0600
@@ -210,7 +210,9 @@
microOps[0] = new MicroAddiUop(machInst, INTREG_UREG0, RN, 0);
unsigned reg = 0;
- bool forceUser = machInst.puswl.psruser;
+ bool force_user = machInst.puswl.psruser & !OPCODE_15;
+ bool exception_ret = machInst.puswl.psruser & OPCODE_15;
+
for (int i = 1; i < ones + 1; i++) {
// Find the next register.
while (!bits(regs, reg))
@@ -218,12 +220,12 @@
replaceBits(regs, reg, 0);
unsigned regIdx = reg;
- if (forceUser) {
+ if (force_user) {
regIdx = intRegForceUser(regIdx);
}
if (machInst.puswl.loadOp) {
- if (reg == INTREG_PC && forceUser) {
+ if (reg == INTREG_PC && exception_ret) {
// This must be the exception return form of ldm.
microOps[i] =
new MicroLdrRetUop(machInst, regIdx, INTREG_UREG0, addr);
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