# HG changeset patch # User Brad Beckmann <brad.beckm...@amd.com> # Date 1260657435 28800 # Node ID dcde9bc50b96aa1197e001486522a37cb18fd2f1 # Parent 05140b07714b6f591b3f511b7a3f076aae3d756b ruby: Fixed the Sequencer init function Removed the Sequencer init function so that the parent (RubyPort) init function is used instead and thus the mandatory queue is set to the correct value.
diff -r 05140b07714b -r dcde9bc50b96 src/mem/ruby/system/Sequencer.cc --- a/src/mem/ruby/system/Sequencer.cc Sat Dec 12 14:37:15 2009 -0800 +++ b/src/mem/ruby/system/Sequencer.cc Sat Dec 12 14:37:15 2009 -0800 @@ -83,10 +83,6 @@ assert(m_dataCache_ptr != NULL); } -void Sequencer::init() -{ -} - Sequencer::~Sequencer() { } @@ -493,7 +489,7 @@ // Send the message to the cache controller assert(latency > 0); - + assert(m_mandatory_q_ptr != NULL); m_mandatory_q_ptr->enqueue(msg, latency); } /* diff -r 05140b07714b -r dcde9bc50b96 src/mem/ruby/system/Sequencer.hh --- a/src/mem/ruby/system/Sequencer.hh Sat Dec 12 14:37:15 2009 -0800 +++ b/src/mem/ruby/system/Sequencer.hh Sat Dec 12 14:37:15 2009 -0800 @@ -71,7 +71,6 @@ typedef RubySequencerParams Params; // Constructors Sequencer(const Params *); - void init(); // Destructor ~Sequencer(); _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev