changeset 862f3d824be7 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=862f3d824be7
description:
inorder: set thread status'
set Active/Suspended/Halted status for threads. useful for system when
determining
if/when to exit simulation
diffstat:
2 files changed, 10 insertions(+), 3 deletions(-)
src/cpu/inorder/cpu.cc | 12 ++++++++++--
src/cpu/inorder/thread_context.hh | 1 -
diffs (55 lines):
diff -r e350ae2a5018 -r 862f3d824be7 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sun Jan 31 18:28:05 2010 -0500
+++ b/src/cpu/inorder/cpu.cc Sun Jan 31 18:28:12 2010 -0500
@@ -711,6 +711,8 @@
thread[tid]->lastActivate = curTick;
+ tcBase(tid)->setStatus(ThreadContext::Active);
+
wakeCPU();
}
}
@@ -750,9 +752,11 @@
removePipelineStalls(*thread_it);
- //@TODO: change stage status' to Idle?
+ activeThreads.erase(thread_it);
- activeThreads.erase(thread_it);
+ // Ideally, this should be triggered from the
+ // suspendContext/Thread functions
+ tcBase(tid)->setStatus(ThreadContext::Suspended);
}
assert(!isThreadActive(tid));
@@ -854,6 +858,8 @@
squashThreadInPipeline(tid);
haltedThreads.push_back(tid);
+ tcBase(tid)->setStatus(ThreadContext::Halted);
+
if (threadModel == SwitchOnCacheMiss) {
activateNextReadyContext();
}
@@ -872,6 +878,8 @@
deactivateThread(tid);
suspendedThreads.push_back(tid);
thread[tid]->lastSuspend = curTick;
+
+ tcBase(tid)->setStatus(ThreadContext::Suspended);
}
void
diff -r e350ae2a5018 -r 862f3d824be7 src/cpu/inorder/thread_context.hh
--- a/src/cpu/inorder/thread_context.hh Sun Jan 31 18:28:05 2010 -0500
+++ b/src/cpu/inorder/thread_context.hh Sun Jan 31 18:28:12 2010 -0500
@@ -64,7 +64,6 @@
/** Pointer to the thread state that this TC corrseponds to. */
InOrderThreadState *thread;
-
/** Returns a pointer to the ITB. */
/** @TODO: PERF: Should we bind this to a pointer in constructor? */
TheISA::TLB *getITBPtr() { return cpu->getITBPtr(); }
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