changeset 4524f8f80973 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4524f8f80973
description:
inorder: write-hints bug fix
make sure to only read 1 src reg. for write-hint and any other similar
'store' instruction. Reading the source reg when its not necessary
can cause the simulator to read from uninitialized values
diffstat:
1 file changed, 3 insertions(+), 1 deletion(-)
src/cpu/inorder/pipeline_traits.cc | 4 +++-
diffs (14 lines):
diff -r 8a05ebc9d372 -r 4524f8f80973 src/cpu/inorder/pipeline_traits.cc
--- a/src/cpu/inorder/pipeline_traits.cc Tue Mar 23 00:29:10 2010 -0400
+++ b/src/cpu/inorder/pipeline_traits.cc Sat Mar 27 01:40:05 2010 -0400
@@ -116,7 +116,9 @@
if ( inst->isLoad() ) {
M->needs(DCache, CacheUnit::InitiateReadData);
} else if ( inst->isStore() ) {
- M->needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+ if ( inst->numSrcRegs() >= 2 ) {
+ M->needs(RegManager, UseDefUnit::ReadSrcReg, 1);
+ }
M->needs(AGEN, AGENUnit::GenerateAddr);
M->needs(DCache, CacheUnit::InitiateWriteData);
}
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