Jiayuan Meng wrote: > > > > 2. SIMD cores: Based on TimingSimpleCPU. > This sounds pretty interesting too. Does the ISA matter much, or do > you think it could be pretty generic? Did you add new instructions to > do things? > > > Yes, I amended the Alpha ISA and added two instructions to mark the > begin and end of branch divergences. I assume we can do the same thing > for other ISAs.
I'm not a fan of adding new instructions to all the ISAs with a narrowly defined uses like this. X86 has plenty of real instructions that don't get used very often, and it's turned into a big mess in a lot of ways. Maybe what we could/should do is add a few pseudo instructions that don't actually do anything but that are already plumbed everywhere. People can use those as examples, and/or fill them out or hook into them somehow for whatever they need. Like I said though, if this isn't likely useful to, off the top of my head, a quarter of the M5 users, I don't think it should go in the mainline, especially when it isn't completely self contained. Another possibility, though, might be to have some sort of collection of this extra stuff interested parties can grab but that won't complicate things for everyone else. That way people can share their valuable hard work without making M5 even bigger and harder to figure out. Gabe _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
