[m5-dev] changeset in m5: x86: minor checkpointing bug fixes

[Steve Reinhardt]

changeset b4aa25440bdd in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b4aa25440bdd
description:
        x86: minor checkpointing bug fixes

diffstat:

 src/arch/x86/interrupts.hh |  4 ++--
 src/arch/x86/isa.cc        |  5 +++++
 2 files changed, 7 insertions(+), 2 deletions(-)

diffs (34 lines):

diff -r 3f6413fc37a2 -r b4aa25440bdd src/arch/x86/interrupts.hh
--- a/src/arch/x86/interrupts.hh        Tue Aug 17 05:17:06 2010 -0700
+++ b/src/arch/x86/interrupts.hh        Tue Aug 17 05:20:39 2010 -0700
@@ -260,13 +260,13 @@
     void
     serialize(std::ostream &os)
     {
-        panic("Interrupts::serialize unimplemented!\n");
+        warn("Interrupts::serialize unimplemented!\n");
     }
 
     void
     unserialize(Checkpoint *cp, const std::string &section)
     {
-        panic("Interrupts::unserialize unimplemented!\n");
+        warn("Interrupts::unserialize unimplemented!\n");
     }
 
     /*
diff -r 3f6413fc37a2 -r b4aa25440bdd src/arch/x86/isa.cc
--- a/src/arch/x86/isa.cc       Tue Aug 17 05:17:06 2010 -0700
+++ b/src/arch/x86/isa.cc       Tue Aug 17 05:20:39 2010 -0700
@@ -352,6 +352,11 @@
                  const std::string & section)
 {
     UNSERIALIZE_ARRAY(regVal, NumMiscRegs);
+    updateHandyM5Reg(regVal[MISCREG_EFER],
+                     regVal[MISCREG_CR0],
+                     regVal[MISCREG_CS_ATTR],
+                     regVal[MISCREG_SS_ATTR],
+                     regVal[MISCREG_RFLAGS]);
 }
 
 }
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