> On 2010-08-19 08:51:48, Nathan Binkert wrote: > > Why exactly did you make this change. The FifoBuffer class limits (I > > think) the number of entries allowed and you removed that restriction. Are > > you sure you want to do that?
we don't really want to limit the number of requests the cpu can queue here. instead we'll limit the number of simultaneous requests that the table walker can have outstanding (currently 1). If we don't do this the cpu load/store/fetch gets even uglier since it can now have to replay a load because of a temporary table walker full case. > On 2010-08-19 08:51:48, Nathan Binkert wrote: > > src/arch/arm/table_walker.hh, line 51 > > <http://reviews.m5sim.org/r/158/diff/1/?file=1792#file1792line51> > > > > We put the standard includes above the rest in sorted order. fixed. - Ali ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/158/#review229 ----------------------------------------------------------- On 2010-08-13 09:41:33, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/158/ > ----------------------------------------------------------- > > (Updated 2010-08-13 09:41:33) > > > Review request for Default. > > > Summary > ------- > > ARM: Use a stl queue for the table walker state > > > Diffs > ----- > > src/arch/arm/table_walker.hh 3c48b2b3cb83 > src/arch/arm/table_walker.cc 3c48b2b3cb83 > > Diff: http://reviews.m5sim.org/r/158/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
