Quoting Ali Saidi <[email protected]>:
We're not forcing all cpu models to support predication, only have to a function allows the cpu to understand if an instruction didn't execute because it was predicated. If the CPU chooses to do nothing with that, as the simple cpus do, then so be it. It's like saying that we shouldn't have a micro-pc function because Alpha doesn't have any micro-coded instructions or we shouldn't have a NextNPC because only sparc has delay slots.
A difference is those ISAs simply wouldn't function otherwise, and that's not the case here. I've actually thought about ways to abstract away even those differences and just have an opaque "PC" blob that can increment and be compared for equality and leave all the details to the ISA.
I'd really like to try to bring down the complexity inside our CPUs and ISA descriptions, and while this change isn't the end of the world, it's definitely an avoidable step in the opposite direction.
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