changeset 1e789578729e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1e789578729e
description:
        ARM: Add a fake flash controller so that unmodified linux can boot

        With this change an unmodified Linux kernel can boot in M5.

diffstat:

 src/dev/arm/RealView.py |  124 ++++++++++++++++++++++++-----------------------
 1 files changed, 63 insertions(+), 61 deletions(-)

diffs (138 lines):

diff -r d9efdb9ac88e -r 1e789578729e src/dev/arm/RealView.py
--- a/src/dev/arm/RealView.py   Fri Oct 01 16:04:00 2010 -0500
+++ b/src/dev/arm/RealView.py   Fri Oct 01 16:04:02 2010 -0500
@@ -101,6 +101,69 @@
     timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
 
     l2x0_fake     = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, 
warn_access="1")
+    flash_fake    = IsaFake(pio_addr=0x40000000, pio_size=0x4000000)
+    dmac_fake     = AmbaFake(pio_addr=0x10030000)
+    uart1_fake    = AmbaFake(pio_addr=0x1000a000)
+    uart2_fake    = AmbaFake(pio_addr=0x1000b000)
+    uart3_fake    = AmbaFake(pio_addr=0x1000c000)
+    smc_fake      = AmbaFake(pio_addr=0x100e1000)
+    clcd_fake     = AmbaFake(pio_addr=0x10020000)
+    sp810_fake    = AmbaFake(pio_addr=0x10001000, ignore_access=True)
+    watchdog_fake = AmbaFake(pio_addr=0x10010000)
+    gpio0_fake    = AmbaFake(pio_addr=0x10013000)
+    gpio1_fake    = AmbaFake(pio_addr=0x10014000)
+    gpio2_fake    = AmbaFake(pio_addr=0x10015000)
+    ssp_fake      = AmbaFake(pio_addr=0x1000d000)
+    sci_fake      = AmbaFake(pio_addr=0x1000e000)
+    aaci_fake     = AmbaFake(pio_addr=0x10004000)
+    mmc_fake      = AmbaFake(pio_addr=0x10005000)
+    kmi0_fake     = AmbaFake(pio_addr=0x10006000)
+    kmi1_fake     = AmbaFake(pio_addr=0x10007000)
+    rtc_fake      = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
+
+
+
+    # Attach I/O devices that are on chip
+    def attachOnChipIO(self, bus):
+       self.gic.pio = bus.port
+       self.l2x0_fake.pio = bus.port
+
+    # Attach I/O devices to specified bus object.  Can't do this
+    # earlier, since the bus object itself is typically defined at the
+    # System level.
+    def attachIO(self, bus):
+       self.uart.pio          = bus.port
+       self.realview_io.pio   = bus.port
+       self.timer0.pio        = bus.port
+       self.timer1.pio        = bus.port
+       self.dmac_fake.pio     = bus.port
+       self.uart1_fake.pio    = bus.port
+       self.uart2_fake.pio    = bus.port
+       self.uart3_fake.pio    = bus.port
+       self.smc_fake.pio      = bus.port
+       self.clcd_fake.pio     = bus.port
+       self.sp810_fake.pio    = bus.port
+       self.watchdog_fake.pio = bus.port
+       self.gpio0_fake.pio    = bus.port
+       self.gpio1_fake.pio    = bus.port
+       self.gpio2_fake.pio    = bus.port
+       self.ssp_fake.pio      = bus.port
+       self.sci_fake.pio      = bus.port
+       self.aaci_fake.pio     = bus.port
+       self.mmc_fake.pio      = bus.port
+       self.kmi0_fake.pio     = bus.port
+       self.kmi1_fake.pio     = bus.port
+       self.rtc_fake.pio      = bus.port
+       self.flash_fake.pio    = bus.port
+
+class RealViewEB(RealView):
+    uart = Pl011(pio_addr=0x10009000, int_num=44)
+    realview_io = RealViewCtrl(pio_addr=0x10000000)
+    gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000)
+    timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
+    timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
+
+    l2x0_fake     = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, 
warn_access="1")
     dmac_fake     = AmbaFake(pio_addr=0x10030000)
     uart1_fake    = AmbaFake(pio_addr=0x1000a000)
     uart2_fake    = AmbaFake(pio_addr=0x1000b000)
@@ -154,64 +217,3 @@
        self.kmi1_fake.pio     = bus.port
        self.rtc_fake.pio      = bus.port
 
-class RealViewEB(RealView):
-    uart = Pl011(pio_addr=0x10009000, int_num=44)
-    realview_io = RealViewCtrl(pio_addr=0x10000000)
-    gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000)
-    timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
-    timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
-
-    l2x0_fake     = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, 
warn_access="1")
-    dmac_fake     = AmbaFake(pio_addr=0x10030000)
-    uart1_fake    = AmbaFake(pio_addr=0x1000a000)
-    uart2_fake    = AmbaFake(pio_addr=0x1000b000)
-    uart3_fake    = AmbaFake(pio_addr=0x1000c000)
-    smc_fake      = AmbaFake(pio_addr=0x100e1000)
-    clcd_fake     = AmbaFake(pio_addr=0x10020000)
-    sp810_fake    = AmbaFake(pio_addr=0x10001000, ignore_access=True)
-    watchdog_fake = AmbaFake(pio_addr=0x10010000)
-    gpio0_fake    = AmbaFake(pio_addr=0x10013000)
-    gpio1_fake    = AmbaFake(pio_addr=0x10014000)
-    gpio2_fake    = AmbaFake(pio_addr=0x10015000)
-    ssp_fake      = AmbaFake(pio_addr=0x1000d000)
-    sci_fake      = AmbaFake(pio_addr=0x1000e000)
-    aaci_fake     = AmbaFake(pio_addr=0x10004000)
-    mmc_fake      = AmbaFake(pio_addr=0x10005000)
-    kmi0_fake     = AmbaFake(pio_addr=0x10006000)
-    kmi1_fake     = AmbaFake(pio_addr=0x10007000)
-    rtc_fake      = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
-
-
-
-    # Attach I/O devices that are on chip
-    def attachOnChipIO(self, bus):
-       self.gic.pio = bus.port
-       self.l2x0_fake.pio = bus.port
-
-    # Attach I/O devices to specified bus object.  Can't do this
-    # earlier, since the bus object itself is typically defined at the
-    # System level.
-    def attachIO(self, bus):
-       self.uart.pio          = bus.port
-       self.realview_io.pio   = bus.port
-       self.timer0.pio        = bus.port
-       self.timer1.pio        = bus.port
-       self.dmac_fake.pio     = bus.port
-       self.uart1_fake.pio    = bus.port
-       self.uart2_fake.pio    = bus.port
-       self.uart3_fake.pio    = bus.port
-       self.smc_fake.pio      = bus.port
-       self.clcd_fake.pio     = bus.port
-       self.sp810_fake.pio    = bus.port
-       self.watchdog_fake.pio = bus.port
-       self.gpio0_fake.pio    = bus.port
-       self.gpio1_fake.pio    = bus.port
-       self.gpio2_fake.pio    = bus.port
-       self.ssp_fake.pio      = bus.port
-       self.sci_fake.pio      = bus.port
-       self.aaci_fake.pio     = bus.port
-       self.mmc_fake.pio      = bus.port
-       self.kmi0_fake.pio     = bus.port
-       self.kmi1_fake.pio     = bus.port
-       self.rtc_fake.pio      = bus.port
-
_______________________________________________
m5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/m5-dev

Reply via email to