> On 2010-10-15 17:33:04, Steve Reinhardt wrote: > > The first sentence of the commit message is pretty confusing > > (self-contradicting if you read it wrong). > > > > I don't object to this particular change, but isn't it just working around > > a design flaw in TimingSimpleCPU, and wouldn't it be better to fix that > > instead? > > > > Also, assuming the answer there is no, shouldn't the same fix be applied in > > the x86 table walker too? > > Ali Saidi wrote: > I think it's pretty reasonable that the table walker will take a cycle > after it gets the required data to provide it to the CPU. I don't know that > we want to convolute the code in the timing "simple" cpu model anymore.
Yea, my hope was that we might find a way to fix this while simplifying TimingSimpleCPU... I agree, I have no desire to make it more complicated. - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/257/#review379 ----------------------------------------------------------- On 2010-10-02 19:20:00, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/257/ > ----------------------------------------------------------- > > (Updated 2010-10-02 19:20:00) > > > Review request for Default. > > > Summary > ------- > > ARM: Don't return the result of a table walk the same cycle it's returned. > > The L1 cache may have been accessed to provide this data, which confuses > it, if it ends up being accesses twice in one cycle. Instead wait 1 tick > which will force the timing simple CPU to forward to its next clock cycle > when the translation completes. > > Also prevent multiple outstanding table walks from occuring at once. > > > Diffs > ----- > > src/arch/arm/table_walker.hh e78b6bba67ca > src/arch/arm/table_walker.cc e78b6bba67ca > > Diff: http://reviews.m5sim.org/r/257/diff > > > Testing > ------- > > > Thanks, > > Ali > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
