nathan binkert wrote: >> It might work to make callpal and rti SerializeAfter if they aren't >> already (or we may have to force a flush) and have them set a PAL bit in >> some control reg somewhere. Then the TLB can use that and ignore the PC. >> That would probably make those instructions perform worse, though. >> > > I think that's the issue. The PC is in effect a renamed register, so > however we store this information, it should be in effect renamed. > callpal is IsNonSpeculative. hw_rei (the return instruction) is > IsSerializing and IsSerializeBefore, though I'm not positive why that > must be. Both could have something to do with how pal-shaodw > registers work with the flattening. > > Nate > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev >
I honestly don't remember if I converted Alpha to use the flattening or if it still does things the original way. callpal is probably non-speculative because of the times where it's faked. You can't speculatively fake a pal call (or at least I assume). I don't know why hw_rei is serializing, but I'd guess it's the shadow registers. ARM has this same problem, sort of, where I stuffed flags in the PC so that they'd track passively, where always available, and were effectively renamed/speculated. We could pass that object as part of the request as we've talked about, but I'm really hesitant to bloat it out like that for a single bit of useful information that only matters in one ISA. In ARM the PC was already being passed to all the places it was needed, or at least that's how I remember it. Gabe _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
