changeset fe91d5e2c374 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=fe91d5e2c374
description:
ARM: Don't pretend to writeback registers in initiateAcc.
diffstat:
src/arch/arm/isa/templates/mem.isa | 19 -------------------
1 files changed, 0 insertions(+), 19 deletions(-)
diffs (50 lines):
diff -r 5e129d3c6d7e -r fe91d5e2c374 src/arch/arm/isa/templates/mem.isa
--- a/src/arch/arm/isa/templates/mem.isa Mon Oct 18 13:05:15 2010 -0700
+++ b/src/arch/arm/isa/templates/mem.isa Fri Oct 22 00:22:59 2010 -0700
@@ -131,10 +131,6 @@
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, &memData);
}
-
- if (fault == NoFault) {
- %(op_wb)s;
- }
} else {
xc->setPredicate(false);
}
@@ -393,11 +389,6 @@
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, NULL);
}
-
- // Need to write back any potential address register update
- if (fault == NoFault) {
- %(op_wb)s;
- }
} else {
xc->setPredicate(false);
}
@@ -431,11 +422,6 @@
fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
memAccessFlags, NULL);
}
-
- // Need to write back any potential address register update
- if (fault == NoFault) {
- %(op_wb)s;
- }
} else {
xc->setPredicate(false);
}
@@ -473,11 +459,6 @@
fault = xc->writeBytes(memUnion.bytes, %(size)d, EA,
memAccessFlags, NULL);
}
-
- // Need to write back any potential address register update
- if (fault == NoFault) {
- %(op_wb)s;
- }
}
if (fault == NoFault && machInst.itstateMask != 0 &&
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