changeset ce987fa77797 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ce987fa77797
description:
X86: Make syscall instructions non-speculative in SE.
diffstat:
src/arch/x86/isa/decoder/one_byte_opcodes.isa | 3 ++-
src/arch/x86/isa/decoder/two_byte_opcodes.isa | 6 ++++--
2 files changed, 6 insertions(+), 3 deletions(-)
diffs (36 lines):
diff -r 7733c562e5e3 -r ce987fa77797
src/arch/x86/isa/decoder/one_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa Fri Oct 22 00:23:19
2010 -0700
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa Fri Oct 22 00:23:50
2010 -0700
@@ -402,7 +402,8 @@
// the first byte.
0x5: decode IMMEDIATE {
-0x80:
- SyscallInst::int80('xc->syscall(Rax)', IsSyscall);
+ SyscallInst::int80('xc->syscall(Rax)',
+ IsSyscall, IsNonSpeculative);
default: int_Ib();
}
#endif
diff -r 7733c562e5e3 -r ce987fa77797
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa Fri Oct 22 00:23:19
2010 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa Fri Oct 22 00:23:50
2010 -0700
@@ -228,7 +228,8 @@
0x1: Inst::SYSCALL_LEGACY();
}
#else
- 0x05: SyscallInst::syscall('xc->syscall(Rax)', IsSyscall);
+ 0x05: SyscallInst::syscall('xc->syscall(Rax)',
+ IsSyscall, IsNonSpeculative);
#endif
0x06: Inst::CLTS();
0x07: decode MODE_SUBMODE {
@@ -404,7 +405,8 @@
#if FULL_SYSTEM
0x4: sysenter();
#else
- 0x4: SyscallInst::sysenter('xc->syscall(Rax)', IsSyscall);
+ 0x4: SyscallInst::sysenter('xc->syscall(Rax)',
+ IsSyscall, IsNonSpeculative);
#endif
0x5: sysexit();
0x6: Inst::UD2();
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