Steve Reinhardt wrote: > Having instructions internally manage undoing state like that in what > is supposed to be a functional description of instruction semantics > seems pretty odd to me. I confess that I haven't followed all the ins > and outs of this issue closely, but what problem is this change trying > to solve? Is this just to get STUPD to be a single uop instead of two > uops that communicate via a temp reg, without forcing dependent > instructions to wait for the STUPD to commit to get the updated base > value? >
I wouldn't say "just", but essentially yes. > If part of the problem is that O3 doesn't call completeAcc on stores, > then why don't we just change O3 to do that? > I don't know what all would have to change, so I'm hesitant to try to do that. More importantly, though, completeAcc was left off for a reason, specifically that 99% of the time completeAcc for stores is a nop. Also putting the update in completeAcc significantly delays when it's available to other instructions. > Do we need another execution phase like completeTrans() that can be > overridden here? Generally it's not unreasonable to say that any > exception that occurs post-translation on a store is imprecise... I > don't know if x86 specifically has any exceptions to that rule. > I think that would be a fairly major change, and 99% of the time completeTrans either wouldn't be used or wouldn't do anything, depending on how it's implemented. I don't think we're talking about exceptions post translation, just during translation. In the simple CPU register updates will still have taken place because with delayed translation the instruction won't know if there was a fault or not. but in O3 the register updates would be dropped. This inconsistency complicates the problem, and by making -both- commit register updates at the end of iniateAcc the model is more consistent and the problem is more tractable. If initateAcc wants to return its own fault for some reason (which never happens with our current implementation as far as I can tell) then that would be how it avoids the translation at all. That would be a pre translation exception. Also, since this is a virtual address, after translation is also delayed more than necessary when that might involve page table walks, etc. Gabe _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
