----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/296/ -----------------------------------------------------------
Review request for Default. Summary ------- O3: prevent a squash when completeAcc() modifies misc reg through TC. This happens on ARM instructions when they update the IT state bits. Code and associated comment was copied from execute() and initiateAcc() methods Diffs ----- src/cpu/o3/dyn_inst_impl.hh f61e079ad05e Diff: http://reviews.m5sim.org/r/296/diff Testing ------- Thanks, Ali _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
