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Review request for Default. Summary ------- ARM/CPU: Add op classes for SIMD type instructions and use them in ARM ISA description. Diffs ----- src/arch/arm/isa/insts/div.isa f61e079ad05e src/arch/arm/isa/insts/fp.isa f61e079ad05e src/arch/arm/isa/insts/mult.isa f61e079ad05e src/arch/arm/isa/insts/neon.isa f61e079ad05e src/cpu/FuncUnit.py f61e079ad05e src/cpu/o3/FUPool.py f61e079ad05e src/cpu/o3/FuncUnitConfig.py f61e079ad05e src/cpu/op_class.hh f61e079ad05e Diff: http://reviews.m5sim.org/r/297/diff Testing ------- Thanks, Ali _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
