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Review request for Default. Summary ------- ARM: Fix SRS instruction to micro-code memory operation and register update. Previously the SRS instruction attempted to writeback in initiateAcc() which worked until a recent change, but was incorrect. Diffs ----- src/arch/arm/isa/insts/str.isa 3155a9ccb66b Diff: http://reviews.m5sim.org/r/305/diff Testing ------- Thanks, Ali
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