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Review request for Default. Summary ------- O3: Support squashing all state after special instruction For SPARC ASIs are added to the ExtMachInst. If the ASI is changed simply marking the instruction as Serializing isn't enough beacuse that only stops rename. This provides a mechanism to squash all the instructions and refetch them Diffs ----- src/arch/sparc/isa/decoder.isa 6286bb50127e src/cpu/base_dyn_inst.hh 6286bb50127e src/cpu/o3/commit_impl.hh 6286bb50127e src/cpu/static_inst.hh 6286bb50127e Diff: http://reviews.m5sim.org/r/320/diff Testing ------- Thanks, Ali
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