----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/344/ -----------------------------------------------------------
Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- The CPSR register should only be used for collecting the itstate when the pipeline is flushed (e.g. init/reset/control flushes). Diffs ----- src/arch/arm/predecoder.hh 2b5fbdcbfb5d src/arch/arm/predecoder.cc 2b5fbdcbfb5d src/cpu/simple/base.cc 2b5fbdcbfb5d Diff: http://reviews.m5sim.org/r/344/diff Testing ------- Thanks, Ali
_______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
