> On 2010-12-08 22:45:44, Gabe Black wrote:
> > src/arch/isa_parser.py, line 795
> > <http://reviews.m5sim.org/r/339/diff/1/?file=5449#file5449line795>
> >
> > These values aren't passed directly to anything, they're exposed
> > through a header file and then imported into the ArmISA namespace in
> > registers.hh. You could define the max source index to be the value
> > generated here plus the dest value. That gets this change out of the parser
> > and avoids bloating the instruction objects for other ISAs that don't need
> > it.
>
> Ali Saidi wrote:
> So you mean don't include max_inst_regs.hh and just put the constants in
> registers.hh?
>
> Ali
>
No. You'd still include that, you just wouldn't reexport it directly with these
lines:
namespace ArmISA {
using ArmISAInst::MaxInstSrcRegs;
using ArmISAInst::MaxInstDestRegs;
You'd create new constants with the same names but in the ArmISA namespace that
were derived from the values in the header file which are in the ArmISAInst
namespace.
- Gabe
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This is an automatically generated e-mail. To reply, visit:
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On 2010-12-06 16:11:17, Ali Saidi wrote:
>
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/339/
> -----------------------------------------------------------
>
> (Updated 2010-12-06 16:11:17)
>
>
> Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and
> Nathan Binkert.
>
>
> Summary
> -------
>
> ARM: Add support for moving predicated false dest operands from sources.
>
>
> Diffs
> -----
>
> src/arch/arm/isa/insts/misc.isa 2b5fbdcbfb5d
> src/arch/isa_parser.py 2b5fbdcbfb5d
> src/cpu/o3/dyn_inst.hh 2b5fbdcbfb5d
> src/cpu/o3/iew_impl.hh 2b5fbdcbfb5d
> src/cpu/o3/lsq_unit_impl.hh 2b5fbdcbfb5d
>
> Diff: http://reviews.m5sim.org/r/339/diff
>
>
> Testing
> -------
>
>
> Thanks,
>
> Ali
>
>
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