changeset d3e6ebcccabf in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=d3e6ebcccabf
description:
Fault: Rename sim/fault.hh to fault_fwd.hh to distinguish it from
faults.hh.
diffstat:
src/arch/alpha/tlb.hh | 2 +-
src/arch/arm/table_walker.hh | 2 +-
src/arch/arm/tlb.hh | 2 +-
src/arch/mips/isa.hh | 2 +-
src/arch/mips/tlb.hh | 2 +-
src/arch/power/tlb.hh | 2 +-
src/arch/sparc/tlb.hh | 2 +-
src/arch/sparc/utility.hh | 2 +-
src/arch/x86/tlb.hh | 2 +-
src/cpu/static_inst.hh | 2 +-
src/sim/fault.hh | 40 ----------------------------------------
src/sim/fault_fwd.hh | 40 ++++++++++++++++++++++++++++++++++++++++
src/sim/faults.hh | 2 +-
src/sim/tlb.hh | 2 +-
14 files changed, 52 insertions(+), 52 deletions(-)
diffs (232 lines):
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/alpha/tlb.hh
--- a/src/arch/alpha/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/alpha/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -42,7 +42,7 @@
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/AlphaTLB.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/tlb.hh"
class ThreadContext;
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/arm/table_walker.hh
--- a/src/arch/arm/table_walker.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/arm/table_walker.hh Thu Feb 03 21:47:58 2011 -0800
@@ -49,7 +49,7 @@
#include "mem/request.hh"
#include "params/ArmTableWalker.hh"
#include "sim/eventq.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
class DmaPort;
class ThreadContext;
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/arm/tlb.hh
--- a/src/arch/arm/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/arm/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -52,7 +52,7 @@
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/ArmTLB.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/tlb.hh"
class ThreadContext;
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/mips/isa.hh
--- a/src/arch/mips/isa.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/mips/isa.hh Thu Feb 03 21:47:58 2011 -0800
@@ -38,7 +38,7 @@
#include "arch/mips/registers.hh"
#include "arch/mips/types.hh"
#include "sim/eventq.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
class BaseCPU;
class Checkpoint;
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/mips/tlb.hh
--- a/src/arch/mips/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/mips/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -44,7 +44,7 @@
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/MipsTLB.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/tlb.hh"
#include "sim/sim_object.hh"
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/power/tlb.hh
--- a/src/arch/power/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/power/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -46,7 +46,7 @@
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/PowerTLB.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/tlb.hh"
class ThreadContext;
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/sparc/tlb.hh
--- a/src/arch/sparc/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/sparc/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -37,7 +37,7 @@
#include "config/full_system.hh"
#include "mem/request.hh"
#include "params/SparcTLB.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/tlb.hh"
class ThreadContext;
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/sparc/utility.hh
--- a/src/arch/sparc/utility.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/sparc/utility.hh Thu Feb 03 21:47:58 2011 -0800
@@ -38,7 +38,7 @@
#include "base/bitfield.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
namespace SparcISA
{
diff -r 19beb0676222 -r d3e6ebcccabf src/arch/x86/tlb.hh
--- a/src/arch/x86/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/arch/x86/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -50,7 +50,7 @@
#include "mem/mem_object.hh"
#include "mem/request.hh"
#include "params/X86TLB.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/tlb.hh"
#include "sim/sim_object.hh"
diff -r 19beb0676222 -r d3e6ebcccabf src/cpu/static_inst.hh
--- a/src/cpu/static_inst.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/cpu/static_inst.hh Thu Feb 03 21:47:58 2011 -0800
@@ -43,7 +43,7 @@
#include "base/refcnt.hh"
#include "base/types.hh"
#include "cpu/op_class.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
// forward declarations
struct AlphaSimpleImpl;
diff -r 19beb0676222 -r d3e6ebcccabf src/sim/fault.hh
--- a/src/sim/fault.hh Thu Feb 03 20:56:27 2011 -0800
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2010 Advanced Micro Devices
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __SIM_FAULT_HH__
-#define __SIM_FAULT_HH__
-
-class FaultBase;
-template <class T> class RefCountingPtr;
-typedef RefCountingPtr<FaultBase> Fault;
-
-FaultBase * const NoFault = 0;
-
-#endif // __SIM_FAULT_HH__
diff -r 19beb0676222 -r d3e6ebcccabf src/sim/fault_fwd.hh
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/sim/fault_fwd.hh Thu Feb 03 21:47:58 2011 -0800
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2010 Advanced Micro Devices
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __SIM_FAULT_HH__
+#define __SIM_FAULT_HH__
+
+class FaultBase;
+template <class T> class RefCountingPtr;
+typedef RefCountingPtr<FaultBase> Fault;
+
+FaultBase * const NoFault = 0;
+
+#endif // __SIM_FAULT_HH__
diff -r 19beb0676222 -r d3e6ebcccabf src/sim/faults.hh
--- a/src/sim/faults.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/sim/faults.hh Thu Feb 03 21:47:58 2011 -0800
@@ -34,7 +34,7 @@
#include "base/refcnt.hh"
#include "base/types.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/stats.hh"
#include "config/full_system.hh"
#include "cpu/static_inst.hh"
diff -r 19beb0676222 -r d3e6ebcccabf src/sim/tlb.hh
--- a/src/sim/tlb.hh Thu Feb 03 20:56:27 2011 -0800
+++ b/src/sim/tlb.hh Thu Feb 03 21:47:58 2011 -0800
@@ -33,7 +33,7 @@
#include "base/misc.hh"
#include "mem/request.hh"
-#include "sim/fault.hh"
+#include "sim/fault_fwd.hh"
#include "sim/sim_object.hh"
class ThreadContext;
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