----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/583/ -----------------------------------------------------------
(Updated 2011-03-14 17:39:33.764506) Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary (updated) ------- sparc: compilation fixes for inorder Add a few constants and functions that the InOrder model wants for SPARC. * * * sparc: add eaComp function InOrder separates the address generation from the actual access so give Sparc that functionality * * * sparc: add control flags for branches branch predictors and other cpu model functions need to know specific information about branches, so add the necessary flags here Diffs (updated) ----- src/arch/sparc/isa/decoder.isa 6c9b532da0a6 src/arch/sparc/isa/formats/branch.isa 6c9b532da0a6 src/arch/sparc/isa/formats/mem/basicmem.isa 6c9b532da0a6 src/arch/sparc/isa/formats/mem/swap.isa 6c9b532da0a6 src/arch/sparc/isa/formats/mem/util.isa 6c9b532da0a6 src/arch/sparc/mt.hh PRE-CREATION src/arch/sparc/registers.hh 6c9b532da0a6 src/cpu/inorder/cpu.cc 6c9b532da0a6 src/cpu/inorder/inorder_dyn_inst.cc 6c9b532da0a6 Diff: http://reviews.m5sim.org/r/583/diff Testing ------- Thanks, Korey _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
