Hi all, I'm looking into figuring out how to specify a particular address range for caches and other memory objects. This would give you the ability to do things like say have shared-banked-L2 implemented using 4 L2 Cache banks.
In the old M5 memory, I know you could actually give a particular memory object a memory range but in Ruby I'm not seeing the same type of interface or support(not to say there isn't, its just not clear to me yet). Does anyone have any knowledge of how to enable this same type of behavior (banked caches or address range specification) OR does anyone have any suggested areas in Ruby to where I should start implementing this? I'm tentatively thinking that if this isnt already in Ruby it can be implemented into the L1 cache controllers but I have reservations on how the network routing will work once those changes are made. Again, if anybody has any thoughts or suggestions please share! -- - Korey _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
