> On 2011-03-31 11:11:03, Brad Beckmann wrote: > > src/mem/ruby/system/RubyPort.cc, line 321 > > <http://reviews.m5sim.org/r/611/diff/2/?file=11382#file11382line321> > > > > This loop is probably the most complicated and important part of this > > patch. It might be easiest if we move this functionality into two > > different functions, one for reads and one for writes. > > > > The read scan just needs to ensure that at least one memory says that > > it has the address in Read_Only or ReadWrite state. We may also want to > > doublecheck that multiple memories say they have the address in ReadWrite > > state. > > > > The write scan is more complicated. If one memory says that it has the > > address in ReadWrite state, then I don't think it matters what state the > > other memories are in (except of course if another memory says it also has > > the address in ReadWrite), the write should succeed. Also if the write > > scans says that all copies are in Read_Only or Invalid/NotPresent state and > > no copies are Busy, the write should succeed. However, writes should fail > > if either no Read_Only or ReadWrite copies are found, or if a Busy copy is > > found and no ReadWrite copy is found. The latter situation will likely > > indicate the functional write is racing with a timing write. There is no > > easy, protocol-agnostic way to resolve such a race in the current > > infrastructure. > > > > Make sense?
I think we should have the following cases for functional writes -- 1. Only read only copies --> write succeeds 2. One read write copy --> write succeeds 3. At least one busy --> write fails. 4. None of the above, then simply update the memory. Memory should also get updated in 1. as well. Brad, from your comment it seems that you expect that there can be multiple read-write copies simultaneously. Is this possible, or would this be a bug in the protocol? - Nilay ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1054 ----------------------------------------------------------- On 2011-03-30 16:19:26, Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/611/ > ----------------------------------------------------------- > > (Updated 2011-03-30 16:19:26) > > > Review request for Default. > > > Summary > ------- > > Ruby: Add support for functional accesses > This patch is meant for aiding discussions on implementation of functional > access support in Ruby. > > > Diffs > ----- > > configs/ruby/MESI_CMP_directory.py d54b7775a6b0 > configs/ruby/Ruby.py d54b7775a6b0 > src/mem/ruby/network/Network.cc d54b7775a6b0 > src/mem/ruby/network/Network.py d54b7775a6b0 > src/mem/ruby/profiler/Profiler.cc d54b7775a6b0 > src/mem/ruby/profiler/Profiler.py d54b7775a6b0 > src/mem/ruby/recorder/Tracer.cc d54b7775a6b0 > src/mem/ruby/recorder/Tracer.py d54b7775a6b0 > src/mem/ruby/system/AbstractMemory.hh PRE-CREATION > src/mem/ruby/system/AbstractMemory.cc PRE-CREATION > src/mem/ruby/system/Cache.py d54b7775a6b0 > src/mem/ruby/system/CacheMemory.hh d54b7775a6b0 > src/mem/ruby/system/CacheMemory.cc d54b7775a6b0 > src/mem/ruby/system/DirectoryMemory.hh d54b7775a6b0 > src/mem/ruby/system/DirectoryMemory.cc d54b7775a6b0 > src/mem/ruby/system/DirectoryMemory.py d54b7775a6b0 > src/mem/ruby/system/RubyPort.hh d54b7775a6b0 > src/mem/ruby/system/RubyPort.cc d54b7775a6b0 > src/mem/ruby/system/RubySystem.py d54b7775a6b0 > src/mem/ruby/system/SConscript d54b7775a6b0 > src/mem/ruby/system/Sequencer.py d54b7775a6b0 > src/mem/ruby/system/System.hh d54b7775a6b0 > src/mem/ruby/system/System.cc d54b7775a6b0 > > Diff: http://reviews.m5sim.org/r/611/diff > > > Testing > ------- > > > Thanks, > > Nilay > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
