> On 2011-03-31 22:08:21, Brad Beckmann wrote: > > This looks great, I just have a few minor suggestions below. > > > > It seems like the next step is to figure out how to deal with functional > > accesses not succeeding in the CPUs and devices. > > Nilay Vaish wrote: > Brad, I would make the changes you have listed below. I also need to add > code for directory memory accesses. Can you elaborate on the next step > you > mentioned? We are yet not dealing with the devices, I believe. > > Nilay Vaish wrote: > One more question for you. Do we need functional access support for the > PioPort > as well? We do not have it currently.
Yes, eventually if we want Ruby to supply data in FS mode, RubyPort will need to support functional access from the PioPort to Ruby memory. It is up to you whether you want to implement that support now, or first make sure functional accesses are working SE mode. If you want to make sure SE mode functional accesses work, first modify the ruby mem tester to issue functional access (right now that is hardcoded off). Also you should try a few binaries under SE mode, like "hello world". - Brad ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1082 ----------------------------------------------------------- On 2011-04-02 11:42:47, Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/611/ > ----------------------------------------------------------- > > (Updated 2011-04-02 11:42:47) > > > Review request for Default. > > > Summary > ------- > > Ruby: Add support for functional accesses > This patch is meant for aiding discussions on implementation of functional > access support in Ruby. > > > Diffs > ----- > > configs/ruby/MESI_CMP_directory.py aeec9e157d06 > configs/ruby/Ruby.py aeec9e157d06 > src/mem/ruby/network/Network.cc aeec9e157d06 > src/mem/ruby/network/Network.py aeec9e157d06 > src/mem/ruby/profiler/Profiler.cc aeec9e157d06 > src/mem/ruby/profiler/Profiler.py aeec9e157d06 > src/mem/ruby/recorder/Tracer.cc aeec9e157d06 > src/mem/ruby/recorder/Tracer.py aeec9e157d06 > src/mem/ruby/system/AbstractMemory.hh PRE-CREATION > src/mem/ruby/system/AbstractMemory.cc PRE-CREATION > src/mem/ruby/system/Cache.py aeec9e157d06 > src/mem/ruby/system/CacheMemory.hh aeec9e157d06 > src/mem/ruby/system/CacheMemory.cc aeec9e157d06 > src/mem/ruby/system/DirectoryMemory.hh aeec9e157d06 > src/mem/ruby/system/DirectoryMemory.cc aeec9e157d06 > src/mem/ruby/system/DirectoryMemory.py aeec9e157d06 > src/mem/ruby/system/RubyPort.hh aeec9e157d06 > src/mem/ruby/system/RubyPort.cc aeec9e157d06 > src/mem/ruby/system/RubySystem.py aeec9e157d06 > src/mem/ruby/system/SConscript aeec9e157d06 > src/mem/ruby/system/Sequencer.cc aeec9e157d06 > src/mem/ruby/system/Sequencer.py aeec9e157d06 > src/mem/ruby/system/System.hh aeec9e157d06 > src/mem/ruby/system/System.cc aeec9e157d06 > > Diff: http://reviews.m5sim.org/r/611/diff > > > Testing > ------- > > > Thanks, > > Nilay > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
