Cool! Now you just need to get it working with ARM :)
Ali On Apr 21, 2011, at 12:15 PM, nathan binkert wrote: > Great work! > > On Thu, Apr 21, 2011 at 12:12 AM, Korey Sewell <ksew...@umich.edu> wrote: >> For 1-4 wide, InOrder Cores running in ALPHA FS mode... Observe terminal >> output: >> "M5 console: m5AlphaAccess @ 0xFFFFFD0200000000 >> Got Configuration 623 >> memsize 8000000 pages 4000 >> First free page after ROM 0xFFFFFC0000018000 >> HWRPB 0xFFFFFC0000018000 l1pt 0xFFFFFC0000040000 l2pt 0xFFFFFC0000042000 >> l3pt_rpb 0xFFFFFC0000044000 l3pt_kernel 0xFFFFFC0000048000 l2reserv >> 0xFFFFFC0000046000 >> kstart = 0xFFFFFC0000310000, kend = 0xFFFFFC0000855898, kentry = >> 0xFFFFFC0000310000, numCPUs = 0x1 >> CPU Clock at 2000 MHz IntrClockFrequency=1024 >> Booting with 1 processor(s) >> ... >> Linux version 2.6.13 (h...@zed.eecs.umich.edu) (gcc version 3.4.3) #1 SMP >> Sun Oct 8 .. >> Brought up 1 CPUs >> ... >> init started: BusyBox v1.1.0 (2007.03.04-01:07+0000) multi-call binary >> mounting filesystems... >> EXT2-fs warning: checktime reached, running e2fsck is recommended >> loading script... >> "* >> **Two Words: "Yes Sir!" >> >> *More Than Two Words: InOrder is booting Linux!!! >> >> Getting to this point took about >30 patches, so I have a lot of >> patch-cleaning work to do before I can place it in the repo. >> >> Also, just because it boots doesn't mean I've tested it with any kind of >> real workload suite (e.g. SPEC or Parsec). I don't have the bandwidth to >> complete stress test through all the benchmarks and test but if someone >> tries and something goes wrong, please post to the mailing list and I'll do >> my best to help you debug. >> >> Either way, I think this is a good milestone and I'll be adding the patches >> and the regression test for ALPHA_FS/10.linux_boot/InOrder-CPU within the >> next week (or two) and then eventually updating more things in our >> handy-dandy M5 status matrix: >> http://m5sim.org/wiki/index.php/Status_Matrix >> >> The next big thing I want to get in InOrder before the "gem5" official merge >> is complete is timing TLB translation and in the longer term microcode >> support. I can't say exactly when those will be added (again, not enough >> time for me to completely focus on this), but if anyone wants to try I have >> a good idea of what needs to be done and can assist. >> >> -- >> - Korey >> _______________________________________________ >> m5-dev mailing list >> m5-dev@m5sim.org >> http://m5sim.org/mailman/listinfo/m5-dev >> > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
