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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- ARM: Construct the predicate test register for more instruction programatically. If one of the condition codes isn't being used in the execution we should only read it if the instruction might be dependent on it. With the preeceding changes there are several more cases where we should dynamically pick instead of assuming as we did before. Diffs ----- src/arch/arm/isa/formats/pred.isa 5a9a639ce16f src/arch/arm/isa/insts/data.isa 5a9a639ce16f src/arch/arm/isa/insts/ldr.isa 5a9a639ce16f src/arch/arm/isa/insts/macromem.isa 5a9a639ce16f src/arch/arm/isa/insts/mem.isa 5a9a639ce16f src/arch/arm/isa/insts/misc.isa 5a9a639ce16f src/arch/arm/isa/insts/mult.isa 5a9a639ce16f src/arch/arm/isa/insts/str.isa 5a9a639ce16f src/arch/arm/isa/operands.isa 5a9a639ce16f Diff: http://reviews.m5sim.org/r/682/diff Testing ------- Thanks, Ali _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
