changeset f64b07758814 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f64b07758814
description:
ruby: use RubyMemory flag & remove setDebug() functionality
The RubyMemory flag wasnt used in the code, creating large gaps in
trace output. Replace cprintfs w/dprintfs
using RubyMemory in memory controller. DPRINTF also deprecate the usage
of the setDebug() pure virtual
function in the AbstractMemoryOrCache Class as well the m_debug/cprintf
functions in MemoryControl.hh/cc
diffstat:
src/mem/ruby/system/AbstractMemOrCache.hh | 1 -
src/mem/ruby/system/MemoryControl.cc | 59 +++++++++++-------------------
src/mem/ruby/system/MemoryControl.hh | 2 -
3 files changed, 21 insertions(+), 41 deletions(-)
diffs (150 lines):
diff -r 3824fbc8ed9a -r f64b07758814 src/mem/ruby/system/AbstractMemOrCache.hh
--- a/src/mem/ruby/system/AbstractMemOrCache.hh Wed May 04 20:38:28 2011 -0500
+++ b/src/mem/ruby/system/AbstractMemOrCache.hh Thu May 05 02:20:31 2011 -0400
@@ -53,7 +53,6 @@
virtual bool areNSlotsAvailable (int n) = 0;
virtual void printConfig (std::ostream& out) = 0;
virtual void print (std::ostream& out) const = 0;
- virtual void setDebug (int debugFlag) = 0;
};
#endif // __MEM_RUBY_SYSTEM_ABSTRACTMEMORCACHE_HH__
diff -r 3824fbc8ed9a -r f64b07758814 src/mem/ruby/system/MemoryControl.cc
--- a/src/mem/ruby/system/MemoryControl.cc Wed May 04 20:38:28 2011 -0500
+++ b/src/mem/ruby/system/MemoryControl.cc Thu May 05 02:20:31 2011 -0400
@@ -176,8 +176,6 @@
{
m_msg_counter = 0;
- m_debug = 0;
-
assert(m_tFaw <= 62); // must fit in a uint64 shift register
m_total_banks = m_banks_per_rank * m_ranks_per_dimm * m_dimms_per_channel;
@@ -253,15 +251,13 @@
{
m_msg_counter++;
memRef.m_msg_counter = m_msg_counter;
- Time arrival_time = memRef.m_time;
- uint64 at = arrival_time;
- bool is_mem_read = memRef.m_is_mem_read;
physical_address_t addr = memRef.m_addr;
int bank = getBank(addr);
- if (m_debug) {
- cprintf("New memory request%7d: %#08x %c arrived at %10d bank = %3x\n",
- m_msg_counter, addr, is_mem_read? 'R':'W', at, bank);
- }
+
+ DPRINTF(RubyMemory, "New memory request%7d: %#08x %c arrived at %10d bank
= %3x\n",
+ m_msg_counter, addr, memRef.m_is_mem_read ? 'R':'W',
+ memRef.m_time * g_eventQueue_ptr->getClock(),
+ bank);
m_profiler_ptr->profileMemReq(bank);
m_input_queue.push_back(memRef);
@@ -294,12 +290,9 @@
{
assert(isReady());
MemoryNode req = m_response_queue.front();
- uint64 returnTime = req.m_time;
- if (m_debug) {
- cprintf("Old memory request%7d: %#08x %c peeked at %10d\n",
- req.m_msg_counter, req.m_addr, req.m_is_mem_read ? 'R':'W',
- returnTime);
- }
+ DPRINTF(RubyMemory, "Peek: memory request%7d: %#08x %c\n",
+ req.m_msg_counter, req.m_addr, req.m_is_mem_read ? 'R':'W');
+
return req;
}
@@ -353,12 +346,6 @@
}
void
-MemoryControl::setDebug(int debugFlag)
-{
- m_debug = debugFlag;
-}
-
-void
MemoryControl::clearStats() const
{
m_profiler_ptr->clearStats();
@@ -379,6 +366,10 @@
req.m_time = arrival_time;
m_response_queue.push_back(req);
+ DPRINTF(RubyMemory, "Enqueueing msg %#08x %c back to directory at %15d\n",
+ req.m_addr, req.m_is_mem_read ? 'R':'W',
+ arrival_time * g_eventQueue_ptr->getClock());
+
// schedule the wake up
g_eventQueue_ptr->scheduleEventAbsolute(m_consumer_ptr, arrival_time);
}
@@ -413,10 +404,8 @@
{
if ((m_bankBusyCounter[bank] > 0) && !m_mem_fixed_delay) {
m_profiler_ptr->profileMemBankBusy();
-#if 0
- if (m_debug)
- printf(" bank %x busy %d\n", bank, m_bankBusyCounter[bank]);
-#endif
+
+ DPRINTF(RubyMemory, "bank %x busy %d\n", bank,
m_bankBusyCounter[bank]);
return false;
}
@@ -489,12 +478,7 @@
return false;
// Issue it:
-#if 0
- if (m_debug) {
- uint64 current_time = g_eventQueue_ptr->getTime();
- printf(" Refresh bank %3x at %lld\n", bank, current_time);
- }
-#endif
+ DPRINTF(RubyMemory, "Refresh bank %3x\n", bank);
m_profiler_ptr->profileMemRefresh();
m_need_refresh--;
@@ -528,13 +512,12 @@
int rank = getRank(bank);
MemoryNode req = m_bankQueues[bank].front();
m_bankQueues[bank].pop_front();
- if (m_debug) {
- uint64 current_time = g_eventQueue_ptr->getTime();
- cprintf(" Mem issue request%7d: %#08x %c at %10d "
- "bank=%3x\n",
- req.m_msg_counter, req.m_addr, req.m_is_mem_read? 'R':'W',
- current_time, bank);
- }
+
+ DPRINTF(RubyMemory, "Mem issue request%7d: %#08x %c "
+ "bank=%3x\n", req.m_msg_counter, req.m_addr,
+ req.m_is_mem_read? 'R':'W',
+ bank);
+
if (req.m_msgptr) { // don't enqueue L3 writebacks
enqueueToDirectory(req, m_mem_ctl_latency + m_mem_fixed_delay);
}
diff -r 3824fbc8ed9a -r f64b07758814 src/mem/ruby/system/MemoryControl.hh
--- a/src/mem/ruby/system/MemoryControl.hh Wed May 04 20:38:28 2011 -0500
+++ b/src/mem/ruby/system/MemoryControl.hh Thu May 05 02:20:31 2011 -0400
@@ -84,7 +84,6 @@
void printConfig(std::ostream& out);
void print(std::ostream& out) const;
- void setDebug(int debugFlag);
void clearStats() const;
void printStats(std::ostream& out) const;
@@ -161,7 +160,6 @@
int m_refresh_bank; // which bank to refresh next
int m_ageCounter; // age of old requests; to detect starvation
int m_idleCount; // watchdog timer for shutting down
- int m_debug; // turn on printf's
MemCntrlProfiler* m_profiler_ptr;
};
_______________________________________________
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev
