> On 2011-05-13 14:38:59, Nathan Binkert wrote: > > Really? Are you sure that really works? Those registers are not renamed > > and things could go wrong.
FPCR should be fine, as the manual requires you to surround it with EXCB (which is still serializing) if you want precise information. rduniq/wruniq I'm less sure about... seems like it should be sufficient to only serialize wruniq though, since the only time you'll have problems with rduniq is if it gets reordered wrt a wruniq. - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/694/#review1233 ----------------------------------------------------------- On 2011-05-13 14:34:53, Yasuko Watanabe wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/694/ > ----------------------------------------------------------- > > (Updated 2011-05-13 14:34:53) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > O3: Removed unnecessary unserialize instruction flags. > > > Diffs > ----- > > src/arch/alpha/isa/decoder.isa 54a65799e4c1 > > Diff: http://reviews.m5sim.org/r/694/diff > > > Testing > ------- > > > Thanks, > > Yasuko > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
