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(Updated 2011-06-12 14:55:53.667339) Review request for Default. Summary (updated) ------- Ruby: Add support for functional accesses This patch is meant for implementing functional access support in Ruby. Currently only the M5Port of RubyPort supports functional accesses. The support for functional through the PioPort will be added as a separate patch. The patch has been tested for MI, MOESI directory, MOESI hammer and MESI directory protocols. It seems that MOESI token protocol cannot support functional accesses with it current implementation, there seems to be some problem with the L2 cache controller. Diffs (updated) ----- configs/example/ruby_direct_test.py ac4da9f8ea80 configs/example/ruby_fs.py ac4da9f8ea80 configs/example/ruby_mem_test.py ac4da9f8ea80 configs/example/ruby_network_test.py ac4da9f8ea80 configs/example/ruby_random_test.py ac4da9f8ea80 configs/ruby/MESI_CMP_directory.py ac4da9f8ea80 configs/ruby/MI_example.py ac4da9f8ea80 configs/ruby/MOESI_CMP_directory.py ac4da9f8ea80 configs/ruby/MOESI_CMP_token.py ac4da9f8ea80 configs/ruby/MOESI_hammer.py ac4da9f8ea80 configs/ruby/Ruby.py ac4da9f8ea80 src/cpu/testers/memtest/memtest.hh ac4da9f8ea80 src/cpu/testers/memtest/memtest.cc ac4da9f8ea80 src/mem/packet.hh ac4da9f8ea80 src/mem/packet.cc ac4da9f8ea80 src/mem/protocol/MOESI_CMP_directory-L1cache.sm ac4da9f8ea80 src/mem/protocol/MOESI_CMP_directory-L2cache.sm ac4da9f8ea80 src/mem/protocol/MOESI_CMP_directory-dir.sm ac4da9f8ea80 src/mem/protocol/MOESI_hammer-cache.sm ac4da9f8ea80 src/mem/protocol/MOESI_hammer-dir.sm ac4da9f8ea80 src/mem/ruby/network/Network.cc ac4da9f8ea80 src/mem/ruby/network/Network.py ac4da9f8ea80 src/mem/ruby/profiler/Profiler.cc ac4da9f8ea80 src/mem/ruby/profiler/Profiler.py ac4da9f8ea80 src/mem/ruby/recorder/Tracer.cc ac4da9f8ea80 src/mem/ruby/recorder/Tracer.py ac4da9f8ea80 src/mem/ruby/slicc_interface/AbstractController.hh ac4da9f8ea80 src/mem/ruby/slicc_interface/AbstractController.cc PRE-CREATION src/mem/ruby/slicc_interface/Controller.py ac4da9f8ea80 src/mem/ruby/slicc_interface/SConscript ac4da9f8ea80 src/mem/ruby/system/AbstractMemory.hh PRE-CREATION src/mem/ruby/system/AbstractMemory.cc PRE-CREATION src/mem/ruby/system/AbstractMemory.py PRE-CREATION src/mem/ruby/system/Cache.py ac4da9f8ea80 src/mem/ruby/system/CacheMemory.hh ac4da9f8ea80 src/mem/ruby/system/CacheMemory.cc ac4da9f8ea80 src/mem/ruby/system/DirectoryMemory.hh ac4da9f8ea80 src/mem/ruby/system/DirectoryMemory.cc ac4da9f8ea80 src/mem/ruby/system/DirectoryMemory.py ac4da9f8ea80 src/mem/ruby/system/RubyPort.hh ac4da9f8ea80 src/mem/ruby/system/RubyPort.cc ac4da9f8ea80 src/mem/ruby/system/RubySystem.py ac4da9f8ea80 src/mem/ruby/system/SConscript ac4da9f8ea80 src/mem/ruby/system/Sequencer.py ac4da9f8ea80 src/mem/ruby/system/System.hh ac4da9f8ea80 src/mem/ruby/system/System.cc ac4da9f8ea80 src/mem/slicc/ast/MemberExprAST.py ac4da9f8ea80 Diff: http://reviews.m5sim.org/r/611/diff Testing ------- Thanks, Nilay _______________________________________________ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
