Hi Nilay, Thanks for your prompt response.
I cannot find detailed information such as the simpleCPU option you described by doing ./build/X86_FS/gem5.opt configs/example/ruby_fs.py -h Can you be more specific? thanks, Carole On Mon, Jul 25, 2011 at 7:28 PM, Nilay Vaish <[email protected]> wrote: > On Mon, 25 Jul 2011, Carole-Jean Wu wrote: > > Where can I find more information on the CPU options, so I can decide >> which >> one is appropriate? >> >> --Carole >> >> On Mon, Jul 25, 2011 at 7:06 PM, Nilay Vaish <[email protected]> wrote: >> >> On Mon, 25 Jul 2011, Carole-Jean Wu wrote: >>> >>> Hi, >>> >>>> >>>> I am trying to load the ruby cache memory module for my Linux X86 >>>> simulated >>>> system. However, simulation won't start because certain memory bus/dma >>>> controller is not implemented in the current release. Is this true? Or >>>> am >>>> I >>>> missing something? >>>> >>>> >>>> If you are using TimingSimple CPU, then I expect gem5 to work for X86 + >>> Ruby combination. >>> >>> > Documentation about CPU models is available on the website gem5.org. If > you do something like -- <gem5 binary> config/examples/ruby_fs.py --help, > you should, hopefully, get a list of options which should also list the CPU > models. > > > -- > Nilay > ______________________________**_________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> >
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