If ARM is like other ISAs, doesn't it still support a physical address space in SE mode just to map sparse virtual addresses to a contiguous zero-based address range, and still use a TLB to cache translations?
Steve On Sat, Sep 17, 2011 at 4:58 PM, Gabriel Michael Black < [email protected]> wrote: > Not built in. ARM_SE is intended to run user space programs, and those > aren't set up to run from the physical address space. > > Gabe > > > Quoting xxx <[email protected]>: > > Hello, >> I want to disable the TLB in ARM_SE. >> Is it possible? If so, how can I disable it? >> >> >> Thanks, >> Joshua >> >> > > > ______________________________**_________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> >
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
