Right, L3 is not supported as of now. There is no three level protocol
available.
On Wed, 8 Feb 2012, Simon Hammond wrote:
Thanks Nilay,
So does that mean at present L3 is not supported ("as-is") if we are using Ruby
as well?
S.
On Feb 8, 2012, at 9:29 AM, Nilay Vaish wrote:
Are you using Ruby? If yes, then you will have to write a three level coherence
protocol first.
--
Nilay
On Wed, 8 Feb 2012, Simon Hammond wrote:
Hey guys,
Can you tell me how I can configure a simulation to use a L3 cache?
I have taken a look in the simulation scripts provided and the CPU objects but
there does not seem to be any reference to an L3 cache (ports etc). I'm
probably missing something here.
Thank you.
--
Simon Hammond
1-(505)-845-7897 / MS-1319
Scalable Computer Architectures / CSRI
Sandia National Laboratories, NM
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--
Simon Hammond
1-(505)-845-7897 / MS-1319
Scalable Computer Architectures / CSRI
Sandia National Laboratories, NM
_______________________________________________
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[email protected]
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_______________________________________________
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http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
