Dear all, Assume the prefetcher is enabled for L1 and L2. When L1 issue 'X', it checks L2 for that address. Also assume that L2 misses. MM replies to L2 with a BLK containing 'X'. Then L2 replies to L1 and pass BLK.
While debugging, I noticed that BLK is set to "prefetched" only in L1. In another word, L2 treats BLK as a regular block. Is this implementation correct? I think that BLK should be marked as "prefetched" in L2 too. Do you have any comment? -- // Naderan *Mahmood; _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
