Reading through the ARM code I've come across something puzzling. Take for
example this code from my timing_simple_cpu_exec.cc file that is generated
by the ISA parser:
Fault LOAD_REG_AN_PN_SN_UN_WY_SZ4Acc::initiateAcc(TimingSimpleCPU *xc,
Trace::InstRecord *traceData) const
{
*[snip]*
unsigned *memAccessFlags =
ArmISA::TLB::MustBeOne|3|ArmISA::TLB::AllowUnaligned;;*
if (testPredicate(OptCondCodesNZ, OptShiftRmCondCodesC,
OptCondCodesV, condCode)/*auto*/)
{
if (fault == NoFault) {
fault = *readMemTiming(xc, traceData, EA, Mem,
memAccessFlags);*
}
} else {
xc->setPredicate(false);
}
return fault;
}
So here I've got memAccessFlags being set to a bunch of ArmISA::TLB flags
and then being passed to readMemTiming() which will eventually end up in
TimingSimpleCPU::readMem() as the flags variable. This variable will then
be used to construct a Request:
Fault
TimingSimpleCPU::readMem(Addr addr, uint8_t *data,
unsigned size, *unsigned flags*)
{
*[snip] *
RequestPtr req = new Request(asid, addr, size,
*flags*, pc, _cpuId, tid);
However, as far as I understand it, the flags that the Request constructor
is expecting is Request flags and not TLB flags. Am I misunderstanding
something about how this works?
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