Hi, I am working on a class project that requires me to modify the fault handling behavior of X86. I am trying to modify the behavior that restores hardware context on every interrupt/trap. I am hoping this is something that Gem5 can help me with. Looking at the code arch/x86/faults.hh seems to be place to start. I'd appreciate any pointers on where to begin.
Thanks for your time. Zahed _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
