Thanks Gabe. I've gone through Intel's manual to understand how traps work. >From my initial code browsing, looks like 'invoke' is the place I need to modify for incoming traps. As for the return, I'll have to make changes to the iret microcode. Thanks for the suggestions. This'll get me started.
Zahed On Sun, Apr 15, 2012 at 3:43 PM, Gabe Black <[email protected]> wrote: > Do you have a good understanding of the behavior of interrupts and traps > work on x86? If not, you should study that first. The fault objects > start the process of entering an interrupt and hand off control to > microcode which actually does a lot of the work. When returning, the > microcode for the iret instruction handles things. > > Gabe > > On 04/15/12 09:21, zahed khurasani wrote: >> Hi, >> >> I am working on a class project that requires me to modify the fault >> handling behavior of X86. >> I am trying to modify the behavior that restores hardware context on >> every interrupt/trap. >> I am hoping this is something that Gem5 can help me with. >> Looking at the code arch/x86/faults.hh seems to be place to start. I'd >> appreciate any >> pointers on where to begin. >> >> Thanks for your time. >> >> Zahed >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
