Hi Amin, If you don't change the state of the cache, writes in the functional state won't update values in the cache which will cause problems. Similarly, if you disconnect the caches from the system any dirty data in there won't get picked up by the functional cpu which would be a problem. To do this you're going to have to modify the caches to take both those issues into account. It might be better to have two memory hierarchies. Have one of them sleeping (but still receiving coherence messages) and then migrate your code between the two different cpus.
Ali On May 2, 2012, at 11:14 AM, Amin Farmahini wrote: > Hi All, > > I am using O3 CPU for running some benchmarks and am trying to switch back > and forth between functional and detailed modes. When the O3 CPU sees a > defined pseudo instruction (lets call it "switchToFunctional"), it should > switch to a fully "functional mode" and it then again switches back to > detailed mode when the processor sees another defined pseudo instruction > (lets call it "switchToDetailed"). In functional mode, all instructions > should be executed in zero (or fixed) cycles and should NOT change the > architected state of the O3 CPU and cache. In other words, in functional mode > I am only interested in the functional correctness of my program regardless > of timing or any effects on cpu and cache state. Can someone comment on how > to implement this? > > I took a look at the "Sampling" page on the Wiki and discussions about > switchCpu instruction on this mailing list. But I am not sure this is in the > right direction. > > Thanks, > Amin > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
