On Fri, June 22, 2012 5:22 pm, Andrea Pellegrini wrote: > Hi all, > > I am doing some experiments w/ SMT and X86 in SE mode. I found something > funny happening w/ the register file, that I wanted to clarify. > > Arch register 16 seems to be assigned always to the zeroRegister in the > rename phase. In the renaming logic, reg 16 is always renamed to the same > physical register (16 for thread0, 55 for thread1, 94 for thread2 and 133 > for thread3). However, the logic in the rename and in the regfile does not > match - and this creates some problems. In particular, in the regfile, the > simulator does not seem to recognize that the register is a zeroReg (as > determined instead from the rename stage). Is that a bug? >
To me, your description of the problem that you are facing is completely unclear. What do you mean by 'recognize'? Any ways, register 16 in x86 is not an architectural register. It is only visible to the micro code. It is supposed to contain 0. I would expect that it is not renamed at all, or as you pointed out, renamed to a fixed register which I guess would not be ever written to. -- Nilay _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
