Hi Zhiguo, I am not very familiar with the protocol files. I think it should be easy to model an inclusive L2 using one state machine. Look at how L1 and L2 communicate currently to implement an exclusive cache. They can communicate via a similar manner for inclusive. Since both L1 and L2 are data structures within the same file, I don't think you need a "queue" to communicate between them in the code.
- Tushar On Sep 11, 2012, at 10:28 PM, GE ZHIGUO wrote: > Hi, Tushar > I also thought of using one sm file for L1 and L2 caches like > MOESI_hammer.sm. > I have two questions. > 1. Hammer is exclusive cache which behave like one level cache. And there is > only one state machine controlling both L1 and L2. > 2. If modeling inclusive cache L1 and L2, is it reasonable to model L1 and L2 > using one state machine? How L1 and L2 communicate, using > trigger queue? > > Thanks! > > Zhiguo > > From: [email protected] [mailto:[email protected]] On > Behalf Of Tushar Krishna > Sent: Wednesday, September 12, 2012 9:52 AM > To: gem5 users mailing list > Subject: Re: [gem5-users] How to specify the latency between L1 and L2 cache > > Hi Zhiguo, > To model a Private L2, you need to change the protocol files, not the > network. MOESI_hammer is an example of a Private L2 protocol in gem5. Here, > there is only one protocol_cache.sm file instead of separate files > protocol_L1cache.sm and protocol_L2cache.sm > The cache.sm file contains both L1 and L2, modeling a fixed delay between > them. Each "cache" is then connected to other "caches" via the network. > > cheers, > Tushar > > > On Sep 11, 2012, at 9:13 PM, GE ZHIGUO wrote: > > > Hi, Tushar > Thanks for your advice. I want to model a private L1 cache and a > private L2 cache connected together. > I am not clear how to get a constant and controllable delay between them. > Hacking the network > Is a way. But, it will be good to have other simpler ways to do this as > private L2 architecture is common also. > Regards, > Zhiguo > > From: [email protected] [mailto:[email protected]] On > Behalf Of Tushar Krishna > Sent: Tuesday, September 11, 2012 10:31 PM > To: gem5 users mailing list > Subject: Re: [gem5-users] How to specify the latency between L1 and L2 cache > > The point of the interconnect network is to model a realistic and variable > delay between L1 and L2 (if it is a shared L2 protocol). > If you want a fixed latency between L1 and L2, play around with the topology > and/or hack into the network to deliver packets with same delay irrespective > of contention. > > - Tushar > > > On Sep 11, 2012, at 1:10 AM, GE ZHIGUO wrote: > > > > Hi, All > The L1 and L2 caches are connected via Interconnections. I specify the > latency of the transitions in SLICC file to 1 cycle when L1 send message to > L2. > But still the latency of the message delivery can be many more than 1 cycle. > My question is how to specify the latency between L1 and L2 cache > Connected via interconnect network. > Thanks! > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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