Thanks Jason. I'm also curious about the op class definition, which can be found in cpu/FuncUnit.py and cpu/op_class.hh. Then the op class is a parameter for InstObjParams function call in arm/isa/insts/*.isa. Does op class define the behavior of an instruction? How can I define a new op class for an instruction?
On Wed, Sep 19, 2012 at 4:38 PM, Jason Clemons <[email protected]>wrote: > > That is a format defined in src/arch/arm/isa/formats/multi.isa > > The decode_block from that file is used to handle instructions in that > decode block. I usually just grep for the uppercase version in > src/arch/arm. > > Hope this helps, > > Jason > > Sent from my Samsung Epic™ 4G > > > > Jianghao Guo <[email protected]> wrote: > > > When I first took a look ALPHA instruction description in > arm/isa/decoder.isa file, there are several different "format" for > different type of instructions. > While for ARM ISA, there is only one "format" named DataOp in the deocder > file, even worse I don't know where to find definition > like ArmMultAndMultAcc::armMultAndMultAcc() in the decoder file. > I must have missed something here. Any hint? Thanks > > decode COND_CODE { > 0xF: ArmUnconditional::armUnconditional(); > default: decode ENCODING { > format DataOp { > 0x0: decode SEVEN_AND_FOUR { > 1: decode MISC_OPCODE { > 0x9: decode PREPOST { > 0: ArmMultAndMultAcc::armMultAndMultAcc(); > > > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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