Thanks for your information. For o3 cpu, there is o3/FuncUnitConfig.py, which defines several function units(inheriting from what is in src/cpu/FuncUnit.py), and o3/FUPool.py for the function unit pool.Why there is no similar configuration for inorder cpu?
When I run "grep IntAluOp * -r" under src/arch/arm/, I got nothing. What does this mean? On Thu, Sep 20, 2012 at 12:06 PM, Ali Saidi <[email protected]> wrote: > ** > > The op class just controls the scheduling of the instruction, how long it > takes to execute and how pipelined the functional unit is. You can create > new functional units in the config files (by inheriting from what is in > src/cpu/FuncUnit.py) and the classes that ops can belong to are in > src/cpu/op_class.hh. If you want to create a new op class you can add it to > the file, create a functional unit that can execute it and then assign a > number of instructions to that particular op class (grep src/arch/arm/ for > the existing op class names to see how they're assigned). > > Ali > > > > On 20.09.2012 11:21, Jianghao Guo wrote: > > Thanks Jason. > I'm also curious about the op class definition, which can be found in > cpu/FuncUnit.py and cpu/op_class.hh. > Then the op class is a parameter for InstObjParams function call in > arm/isa/insts/*.isa. > Does op class define the behavior of an instruction? How can I define a > new op class for an instruction? > > > On Wed, Sep 19, 2012 at 4:38 PM, Jason Clemons <[email protected]>wrote: > >> >> That is a format defined in src/arch/arm/isa/formats/multi.isa >> The decode_block from that file is used to handle instructions in that >> decode block. I usually just grep for the uppercase version in >> src/arch/arm. >> Hope this helps, >> Jason >> >> Sent from my Samsung Epic™ 4G >> >> >> >> Jianghao Guo <[email protected]> wrote: >> >> >> When I first took a look ALPHA instruction description in >> arm/isa/decoder.isa file, there are several different "format" for >> different type of instructions. >> While for ARM ISA, there is only one "format" named DataOp in the deocder >> file, even worse I don't know where to find definition >> like ArmMultAndMultAcc::armMultAndMultAcc() in the decoder file. >> I must have missed something here. Any hint? Thanks >> decode COND_CODE { >> 0xF: ArmUnconditional::armUnconditional(); >> default: decode ENCODING { >> format DataOp { >> 0x0: decode SEVEN_AND_FOUR { >> 1: decode MISC_OPCODE { >> 0x9: decode PREPOST { >> 0: ArmMultAndMultAcc::armMultAndMultAcc(); >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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