On Wed, 5 Dec 2012, Udayan Umapathi wrote:
Hello All,
I have successfully modified the gem5 Ruby Cache Memory model suit my
needs. At run-time, the benchmark I run terminates due to a invalid
state transition. I have a trace of the transitions that I have got
through the debug flag "ProtocolTrace". Can somebody give me a clue on
how I should interpret the trace printed out and How I should go about
debugging. Any help appreciated.
16209000 0 Seq Begin > [0x154890, line
0x154880] ST
16209500 0 Seq Done > [0x152490, line
0x152480] 109 cycles
16209500 0 L1Cache Data_all_Acks IM>M [0x152480, line
0x152480]
16210000 0 L2Cache L1_GETX NP>IM [0x154080, line
0x154080]
16210500 0 L2Cache L1_PUTX MT>M [0x134480, line
0x134480]
Columns are ordered as follows -- cycle, controller version, controller
type, Event Type, Transition, [address, line address], Request Type / Time
to complete the request.
Each cache controller is a state machine. Since you have encountered an
invalid transition, this means that the controller does not know what to
do for the given (state,event) pair.
--
Nilay
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