A configuration register is read to get this value, and it's not changed to reflect the configuration you're actually simulating. It sholudn't matter, but feel free to change it.
Ali On 13.12.2012 02:45, Yongbing Huang wrote: > Hi all, > > I set the associative of L2 cache to 16 in the configuration file when booting ARM FS simulator. However, the boot log of gem5 shown below indicates that the l2 cache is 8-way. I wonder whether the boot information is not correct or the specified configuration is actually ignored. > > [ 0.014981] L2x0 series cache controller enabled > > [ 0.014987] l2x0: 8 ways, CACHE_ID 0xffffffff, AUX_CTRL 0xc2520fff" > > Thanks. > > Best regards, > > -Yongbing Huang > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users [1] Links: ------ [1] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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