Where the instruction counts on the cores the same? If the application was small enough the instruction and ilc might be dominated by the system booting.
Ali On Apr 9, 2013, at 9:54 PM, Hui Zhao <[email protected]> wrote: > I am running a parsec benchmark with 4 threads on 4 core Alpha FS machine, I > used "m5 pin" to bind all 4 threads to the first 2 cores. However, when I > checked the ipc in the stats, I saw all 4 cores have similar ipc. I am > expecting that only first 2 cores have reasonable ipc, and other cores should > have 0 or very low ipc. > The linux kernel is vmlinux_2.6.27-gcc_4.3.4 which should have the > sched_setaffinity funciton working. Does anyone know why? > > Thanks > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
