Hi All
Cache latencies are configurable at 2 places
1) src/mem/protocol/**L1Cache.sm
machine(L1Cache, "MSI Directory L1 Cache CMP")
: Sequencer * sequencer,
int l1_request_latency = 2,
int l1_response_latency = 2,
&
2) configs/common/Caches.py
class L1Cache(BaseCache):
assoc = 2
block_size = 64
latency = '1ns'
mshrs = 10
tgts_per_mshr = 5
is_top_level = True
I am not defining anything in running script.
Which one is finally used during simulation ?
--
Cheers...........
Mann
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