I think I've found a solution to this, I'll try and post a patch in the next couple of days.
Ali On Sep 7, 2013, at 10:51 AM, Ali Saidi <[email protected]> wrote: > I think I've found a fix for this. I'll try to post a patch in the next > couple of days. > > Thanks, > Ali > > On Sep 7, 2013, at 4:01 AM, Tayyar Rzayev <[email protected]> wrote: > >> Tom Manville <tdmanville <at> gmail.com> writes: >>> >>> I'm experiencing a similar problem using a clean copy of gem5-dev. >>> Did anyone find a fix? >>> >>> command line: ../gem5/build/ARM/gem5.fast --outdir=./simple >>> ../gem5/configs/example/fs.py --cpu-type=ar >>> m_detailed --caches --l1d_size=32kB --l1i_size=32kB --l2cache -- >> l2_size=2MB -b >>> simple --kernel=vmlinux- >>> 3.3-arm-vexpress-emm-pcie --machine-type=VExpress_EMM -n 4 >>> Global frequency set at 1000000000000 ticks per second >>> info: kernel located at: ../gem5/system/arm/binaries/vmlinux-3.3-arm- >> vexpress- >>> emm-pcie >>> Listening for system connection on port 5900 >>> Listening for system connection on port 3456 >>> 0: system.remote_gdb.listener: listening for remote gdb on port 7000 >>> 0: system.remote_gdb.listener: listening for remote gdb on port 7001 >>> 0: system.remote_gdb.listener: listening for remote gdb on port 7002 >>> 0: system.remote_gdb.listener: listening for remote gdb on port 7003 >>> info: Using bootloader at address 0x10 >>> **** REAL SIMULATION **** >>> info: Entering event queue <at> 0. Starting simulation... >>> warn: The clidr register always reports 0 caches. >>> warn: clidr LoUIS field of 0b001 to match current ARM implementations. >>> warn: The csselr register isn't implemented. >>> warn: Tried to read RealView I/O at offset 0x60 that doesn't exist >>> warn: instruction 'mcr icialluis' unimplemented >>> warn: instruction 'mcr dccimvac' unimplemented >>> warn: instruction 'mcr dccmvau' unimplemented >>> warn: instruction 'mcr icimvau' unimplemented >>> warn: instruction 'mcr bpiallis' unimplemented >>> panic: Uncachable load [sn:adaa] PC (0x80017e54=>0x80017e58).(0=>1) >>> <at> cycle 70634247500 >>> [invoke:build/ARM/arch/generic/debugfaults.hh, line 94] >>> Memory Usage: 2404444 KBytes >>> Program aborted at cycle 70634247500 >>> >>> Thanks, >>> Tom >>> >> >> >> >> Hi fellow gem5 users! >> >> I am having a sumular issue for the following scenarios: >> >> gem5/build/ARM/gem5.opt >> gem5/configs/example/fs.py >> --disk=arm-ubuntu-natty-headless.img >> --kernel=vmlinux-3.3.8.arm >> --frame-capture >> --cpu-type=arm_detailed >> --caches >> --num-cpu=2 >> >> gem5/build/ARM/gem5.opt >> gem5/configs/example/fs.py >> --disk=arm-ubuntu-natty-headless.img >> --kernel=vmlinux-3.3.8.arm >> --frame-capture >> --cpu-type=DerivO3CPU >> --caches >> --num-cpu=2 >> >> It boots up until "freeing init memory" and then gives this error after some >> time: >> >> panic: Uncachable load [sn:17bc8fec] PC (0xc0129168=>0xc012916c).(0=>1) >> @ cycle 3219292194500 >> [invoke:build/ARM/arch/generic/debugfaults.hh, line 94] >> >> I am using gem5-stable. >> >> Has anyone come across a solution to this?? I would really appreciate any >> help on this. >> >> Thanks a lot! >> >> Tayyar >> >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
